Template:N-bit: Difference between revisions
From Vigyanwiki
No edit summary |
m (10 revisions imported from alpha:Template:N-bit) |
||
| (8 intermediate revisions by 2 users not shown) | |||
| Line 1: | Line 1: | ||
{{Computer architecture bit widths}} | {{Computer architecture bit widths}} | ||
[[ | In [[computer architecture]], '''{{{1}}}-bit''' [[integer (computer science)|integer]]s, [[memory address]]es, or other [[Data (computing)|data]] units are those that are {{{1}}} [[bit]]s {{{2}}} wide. Also, {{{1}}}-bit [[central processing unit]] (CPU) and [[arithmetic logic unit]] (ALU) architectures are those that are based on [[processor register|register]]s, [[address bus]]es, or [[Bus (computing)|data bus]]es of that size.<noinclude> | ||
{{Documentation}} | {{Documentation}} | ||
</noinclude> | </noinclude> | ||
Latest revision as of 09:31, 16 May 2023
| Computer architecture bit widths |
|---|
| Bit |
| Application |
| Binary floating-point precision |
| Decimal floating-point precision |
In computer architecture, {{{1}}}-bit integers, memory addresses, or other data units are those that are {{{1}}} bits {{{2}}} wide. Also, {{{1}}}-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on registers, address buses, or data buses of that size.
Template documentation
[create]
